SerDes Copper and Optical High-Speed Interconnect Standards and Technology for Short and Long Haul Communications
Rapid growth in Internet speeds and data center needs have placed a premium on SerDes (Serializer/Deserializer) speeds. At the same time, Serdes technology in highly integrated Switch ASIC’s have placed a premium on low power consumption. Furthermore, optical modules whose power consumption and form factor are predefined have required the use of novel signal processing schemes with equalization techniques split between analog and digital circuits. This presentation examines the various analog and digital signal processing schemes used in current high speed Serdes, the evolution of standards, the corresponding technical challenges as well as numerous opportunities for further research.

BIO:
Vasu Parthasarathy is a Distinguished Engineer at Broadcom Corporation. His interests are in the general area of signal processing and he has been working on Serdes and optical PHY’s for almost 20 years at Broadcom. Aside from technical design, he is a major contributor to IEEE 802.3 copper, backplane and optical Serdes standards and was instrumental in the transition of IEEE Serdes standards to efficient multi-level signalling. He has a PhD from Rensselaer Polytechnic Institute in Electrical Engineering.